Items where Author is "Mert, Ahmet Can"

Mert, Ahmet Can and Yaman, Ferhat and Karabulut, Emre and Öztürk, Erdinç and Savaş, Erkay and Aysu, Aydin (2023) A survey of software implementations for the number theoretic transform. In: 23rd International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2023, Samos

Ayduman, Can and Koçer, Emre and Kırbıyık, Selim and Mert, Ahmet Can and Savaş, Erkay (2023) Efficient design-time flexible hardware architecture for accelerating homomorphic encryption. In: IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC), Dubai, United Arab Emirates

Mert, Ahmet Can and Karabulut, Emre and Öztürk, Erdinç and Savaş, Erkay and Aysu, Aydın (2022) An extensive study of flexible design methods for the number theoretic transform. IEEE Transactions on Computers, 71 (11). pp. 2829-2843. ISSN 0018-9340 (Print) 1557-9956 (Online)

Türkoğlu, Enes Recep and Özcan, Ali Şah and Ayduman, Can and Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2022) An accelerated GPU library for homomorphic encryption operations of BFV scheme. In: IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA

Derya, Kemal and Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2022) CoHA-NTT: a configurable hardware accelerator for NTT-based polynomial multiplication. Microprocessors and Microsystems, 89 . ISSN 0141-9331 (Print) 1872-9436 (Online)

Özerk, Özgün and Elgezen, Can and Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2022) Efficient number theoretic transform implementation on GPU for homomorphic encryption. Journal of Supercomputing, 78 (2). pp. 2840-2872. ISSN 0920-8542 (Print) 1573-0484 (Online)

Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2022) Low-latency ASIC algorithms of modular squaring of large integers for VDF evaluation. IEEE Transactions on Computers, 71 (1). pp. 107-120. ISSN 0018-9340 (Print) 1557-9956 (Online)

Mert, Ahmet Can (2021) Efficient hardware implementations for lattice-based cryptography primitives. [Thesis]

Yaman, Ferhat and Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2021) A hardware accelerator for polynomial multiplication operation of CRYSTALS-KYBER PQC scheme. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France

Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2020) FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware. Microprocessors and Microsystems, 78 . ISSN 0141-9331 (Print) 1872-9436 (Online)

Mert, Ahmet Can and Karabulut, Emre and Öztürk, Erdinç and Savaş, Erkay and Becchi, Michele and Aysu, Aydın (2020) A flexible and scalable NTT hardware: applications from homomorphically encrypted deep learning to post-quantum cryptography. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France

Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2020) Design and implementation of encryption/decryption architectures for BFV homomorphic encryption scheme. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 28 (2). pp. 353-362. ISSN 1063-8210 (Print) 1557-9999 (Online)

Mert, Ahmet Can and Öztürk, Erdinç and Savaş, Erkay (2019) Design and implementation of a fast and scalable NTT-based polynomial multiplier architecture. In: 22nd Euromicro Conference on Digital System Design (DSD), Kallithea, Greece

Mert, Ahmet Can and Azgın, Hasan and Kalalı, Ercan and Hamzaoğlu, İlker (2019) Novel approximate absolute difference hardware. In: 22nd Euromicro Conference on Digital System Design, DSD 2019, Kallithea, Chalkidiki, Greece

Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2018) A low power versatile video coding (VVC) fractional interpolation hardware. In: 12th Conference on Design and Architectures for Signal and Image Processing (DASIP), Porto, Portugal

Azgın, Hasan and Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2018) A reconfigurable fractional interpolation hardware for VVC motion compensation. In: 21st Euromicro Conference on Digital System Design (DSD), Prague, Czech Republic

Mert, Ahmet Can and Azgın, Hasan and Kalalı, Ercan and Hamzaoğlu, İlker (2018) Efficient multiple constant multiplication using DSP blocks in FPGA. In: 28th International Conference on Field Programmable Logic and Applications (FPL), Dublin, Ireland

Azgın, Hasan and Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2018) An efficient FPGA implementation of HEVC intra prediction. In: IEEE International Conference on Consumer Electronics (ICCE 2018), Las Vegas, NV, USA

Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2018) An HEVC fractional interpolation hardware using memory based constant multiplication. In: IEEE International Conference on Consumer Electronics (ICCE 2018), Las Vegas, NV, USA

Azgın, Hasan and Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2017) Reconfigurable intra prediction hardware for future video coding. IEEE Transactions on Consumer Electronics, 63 (4). pp. 419-425. ISSN 0098-3063 (Print) 1558-4127 (Online)

Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2017) An FPGA implementation of future video coding 2D transform. In: 7th IEEE International Conference on Consumer Electronics (ICCE-Berlin), Berlin, Germany

Kalalı, Ercan and Mert, Ahmet Can and Hamzaoğlu, İlker (2017) Pixel correlation based computation and energy reduction techniques for HEVC fractional interpolation. In: 7th IEEE International Conference on Consumer Electronics (ICCE-Berlin), Berlin, Germany

Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2017) High performance 2D transform hardware for future video coding. IEEE Transactions on Consumer Electronics, 63 (2). pp. 117-125. ISSN 0098-3063 (Print) 1558-4127 (Online)

Mert, Ahmet Can (2017) High performance HEVC and FVC video compression hardware designs. [Thesis]

Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2016) Low complexity HEVC sub-pixel motion estimation technique and its hardware implementation. In: IEEE 6th International Conference on Consumer Electronics - Berlin (ICCE-Berlin 2016), Berlin, Germany

Kalalı, Ercan and Mert, Ahmet Can and Hamzaoğlu, İlker (2016) A computation and energy reduction technique for HEVC discrete cosine transform. IEEE Transactions on Consumer Electronics, 62 (2). pp. 166-174. ISSN 0098-3063 (Print) 1558-4127 (Online)