A low power versatile video coding (VVC) fractional interpolation hardware

Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2018) A low power versatile video coding (VVC) fractional interpolation hardware. In: 12th Conference on Design and Architectures for Signal and Image Processing (DASIP), Porto, Portugal

[thumbnail of DASIP_VVC.pdf] PDF

Download (404kB)


Fractional interpolation in Versatile Video Coding (VVC) standard has much higher computational complexity than fractional interpolation in previous video compression standards. In this paper, a low power VVC fractional interpolation hardware is designed and implemented using Verilog HDL. The proposed hardware is the first VVC fractional interpolation hardware in the literature. It interpolates necessary fractional pixels for 1/16 pixel accuracy for all prediction unit sizes. The proposed VVC fractional interpolation hardware, in the worst case, can process 40 full HD (1920x1080) frames per second. It has up to 17% less power consumption than original VVC fractional interpolation hardware.
Item Type: Papers in Conference Proceedings
Uncontrolled Keywords: VVC; Fractional Interpolation; Hardware Implementation; FPGA; Low Power
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions: Faculty of Engineering and Natural Sciences > Academic programs > Electronics
Faculty of Engineering and Natural Sciences
Depositing User: Ercan Kalalı
Date Deposited: 09 Apr 2019 14:50
Last Modified: 10 Jun 2023 15:44
URI: https://research.sabanciuniv.edu/id/eprint/36937

Actions (login required)

View Item
View Item