Redefining Passive Electronics On Rfics Via Stress-Induced Restructuring Of Patterned Thin Films

Official URL: https://risc01.sabanciuniv.edu/record=b3205740

Manufacturing three dimensional (3D) structures at microscale has been a major challenge in semiconductor fabrication, which heavily relies on planar layer by layer processing of materials. This essentially restricts the geometry of any electronic component to be built on-chip to two dimensions, often at the expense of extreme performance degradation. For instance, passive elements such as inductors or transformers when fabricated monolithically on integrated circuit (IC) chips need to be shape-modified from conventional 3D solenoidal shape to planar two-dimensional spiral shape. While this approach allows easy integration, passive elements built on-chip often suffer from significant reduction in performance compared to their 3D, mm-scale, discrete counterparts. Aiming to overcome these issues, this thesis herein puts forward a novel ICcompatible technological platform to fabricate complex 3D shapes monolithically on IC chips, thereby opening up new opportunities for the semiconductor industry to explore. We show that residual stresses that are commonly observed in metal thin films used in IC fabrication can be indeed leveraged to achieve controllable out-of-plane bending, thus indicating a pathway to build complex 3D shapes at microscale. Fundamentally, stacking two thin film layers with different residual stress values can lead to bending in either upward or downward direction, once the film stack is released from the substrate. By utilizing this fundamental concept, we have built the 3D variants of two types of electronic components commonly used in radio-frequency circuits i.e., inductors and electromechanical switches. We show that shape modification via stress engineering allows maneuvering the device geometry in three dimensions, hence liberating an additional degree of freedom in the device design process and allowing a better performance optimization, as opposed to traditional 2D-restricted designs. Specifically, our 3D inductors show approximately 300% performance improvement (quantified using quality factor) compared to planar coils. Similarly, RF switches fabricated using the proposed methodology operate at 4 times lower actuation voltage and exhibit 5x better isolation, in comparison with devices available in market. In general, the devices we fabricated outperform the commercial state-of-the-art by a large margin, and these performance improvements are crucial for realizing future high data-rate wireless networks. In addition, while we have shown the application of proposed technology to only two types of electronic components, the platform is highly scalable and can easily accommodate other components such as capacitors or transformers etc. As such, we believe our efforts indicate an important landmark towards the implementation of highperformance on-chip RF passive devices that are essential for next generation communication systems.