Digital Self-Interference Cancellation In In-Band Full Duplex Radios: Fpga Implementation And Extension To Multiple Input Multiple Output Systems

Official URL: https://risc01.sabanciuniv.edu/record=b3205739

With the use of in-band full-duplex (IBFD) radios, spectral efficiency is potentially doubled by allowing communicating transceivers to work at the same time and in the same frequency band. The main problem with implementing IBFD systems is the self-interference of the devices due to their transmission at the same time together. For IBFD radios to operate, self-interference must be suppressed with various techniques such as antenna suppression, analogue cancellation or linear cancellation algorithms. In this thesis, different digital self-interference cancellation (DSIC) techniques are implemented. First, the linear self-interference cancellation algorithm is projected into digital circuitry and embedded into the receiver chain of a software-defined radio(SDR) which includes a Virtex 6 field programmable gate array(FPGA) chip. Self-interference cancellation algorithm is tested in real-time using slot-coupled patch antennas along with the SDR board. The performance of the real-time operation is measured by using the simplest medium access control mechanism which implements no control over medium access. Data frames are sent to the medium when the local traffic generator of the SDR board starts. Secondly, the nonlinear DSIC algorithm is implemented for MIMO radio. The non-linear effects of multiple transmitters are estimated by switched radio configuration. In the first mode of the switch, a loop-back cable is connected between each node’s transmitter and receiver. For estimation of the hardware effects, the Memory Polynomial model is used. After training and estimation of the non-linear hardware effects in the first mode, the second mode is activated. In the second mode, non-linearities are applied to the baseband signal which is to be transmitted. Then, the reconstructed signal is fed to the linear cancellation algorithm as a reference signal. The performance of the switched MIMO setup is measured and compared with conventional DSIC algorithms.