High isolation double-balanced down-converter mixer combined With active balun and frequency synthesizer in SiGe BiCMOS for 5G applications

Official URL: https://risc01.sabanciuniv.edu/record=b2766809_(Table of contents)

In this thesis, the design of high isolation down-converter mixers for 5G applications is scrutinized. Sliding IF transceiver architecture appropriate frequency synthesizer is researched and designed. The frequency synthesizer consists of integer- N fourth order Type-II PLL, a frequency double, and a frequency divider by two. To effectively combine the digital/analog circuits with the RF blocks, the IHP’s 130 nm SiGe BiCMOS technology is employed. The proposed mixer achieves high isolation even though the input RF signal is applied as single-ended. The RF leakages are prevented by employing a resonator at the emitter of the transconductance stage, such that the isolation values are equivalent to the ones of the double-balanced mixer. For 26 GHz, the conversion gain (CG) is -7.72 dB. The corresponding 1dB input compression point (IP1dB) is 5.7 dBm. The RF-IF, LO-RF, and LO-IF isolations are above 35 dB, 45 dB, and 35 dB, respectively. The power consumption is 56 mW with a 3.3 V voltage supply, and the active area without the pads is 1 mm2. The PLL block consists of a voltage-controlled oscillator (VCO), a phase frequency detector (PFD), a charge pump (CP), a loop filter (LF), and integer-N divider. The VCO has a phase noise of -114 dBc/Hz, tuning range of 15.88 %, power consumption of 28.7 mW, and an area of 2.3 mm2. The simulated phase noise of the closed loop PLL is -108.7 dBc/Hz.