Power-efficient sampling: towards low-power analog-to-digital converters

Mulleti, Satish and Zirtiloglu, Timur and Tan, Arman and Yazıcıgil, Rabia Tuğçe and Eldar, Yonina C. and De Ville, D. Van (2025) Power-efficient sampling: towards low-power analog-to-digital converters. IEEE Signal Processing Magazine, 42 (2). pp. 106-125. ISSN 1053-5888 (Print) 1558-0792 (Online)

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Abstract

Analog-to-digital converters (ADCs) facilitate the conversion of analog signals into a digital format. While the specific designs and settings of ADCs can vary depending on the application, it is crucial in many modern applications to minimize the devices’ power consumption. The significance of low-power ADCs is particularly evident in fields like mobile and handheld devices reliant on battery operation. Key parameters that dictate ADCs’ power are the sampling rate, dynamic range (DR), and number of quantization bits. Typically, these parameters are required to be higher than a threshold value but can be reduced by using the structure of the signal and by leveraging preprocessing and the system application needs. In this article, we discuss four approaches relevant to a variety of applications.
Item Type: Article
Divisions: Faculty of Engineering and Natural Sciences
Depositing User: Rabia Tuğçe Yazıcıgil
Date Deposited: 08 Sep 2025 10:32
Last Modified: 08 Sep 2025 10:32
URI: https://research.sabanciuniv.edu/id/eprint/52201

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