Accelerating lattice-based cryptosystems

Official URL: https://risc01.sabanciuniv.edu/record=b2767352_(Table of contents)

Lattice-based cryptography has become important over the last couple of years since it gives resistance against quantum attacks that disable current security systems. The polynomial multiplication process is the most time-consuming operation in lattice-based cryptosystems. Number Theoretic Transform (NTT) facilitates efficient polynomial multiplication that is needed for key generation, encryption, and decryption operations. A design needs to offer configurability to work with different NTT parameters, as this would be an asset for developing different versions of the basic design for different cryptosystems. This thesis introduces a configurable design that can generate unified and parametric NTT-based polynomial multipliers. This design supports a broad range of parameters of lattice-bassed cryptosystems, specifically post-quantum cryptography (PQC) schemes. The unified butterfly unit composes the critical block of the design, and it can perform NTT and inverse NTT operations. Unique application areas need different performance goals, and this unit plays a critical role in accomplishing them. The design uses the number of butterfly units as input to achieve specific area and throughput demands and gives an optimized NTT-based polynomial multiplier hardware as output. For scheme parameters, the design offers run-time configurability. Additionally, it provides compile-time configurability for throughput and area demands. As far as we know, this design constitutes the the first NTT-based polynomial multiplier with run-time and compile-time configurability options. The advanced configurability options slightly affect the area and timing results, as indicated by the implementation results. This design has different sub-blocks, such as integer multiplier and reduction unit, and we present the design philosophy of each sub-block with the configurability and performance results.