A 7-bit reverse-saturated SiGe HBT discrete gain step attenuator

Davulcu, Murat and Burak, Abdurrahman and Gürbüz, Yaşar (2020) A 7-bit reverse-saturated SiGe HBT discrete gain step attenuator. IEEE Transactions on Circuits and Systems II: Express Briefs, 67 (4). pp. 665-669. ISSN 1549-7747 (Print) 1558-3791 (Online)

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Abstract

In this brief, the analysis, design, and measured results of a fully integrated 7-bit step attenuator implemented in a 0.25- \mu \text{m} Silicon-Germanium (SiGe) BiCMOS process technology, are described. The attenuator is designed based on delicately ordered and cascaded \Pi /T type attenuation blocks, which are comprised of series/shunt switches employing SiGe hetero-junction bipolar transistors (HBTs) with peak f_{T}/f_{\max } of 110/180 GHz. HBTs are employed as a series switch to decrease the insertion-loss (IL) of the attenuator. Moreover, to the authors' best knowledge, this is the first study presenting the effect of employing reverse-saturated HBTs as a shunt switch for each attenuation blocks. Thanks to this advancement, the highest input-referred 1-dB compression point (IP1dB) is reported for Si-based similar studies. This method also decreases the IL of the proposed attenuator. The measurements result in the state-of-the-art performance with 28.575-dB attenuation range by 0.225-dB gain steps while maintaining 7-bit amplitude resolution across 6.6 GHz-12.8 GHz frequency band, where RMS phase error remains below 3.3° and IL is less than 12.4 dB. The measured IP1dB of the attenuator is 13.5 dBm while drawing 8 mA from 3.3-V supply. The die occupies an area of 1.37 mm \times \,\, 0.56 mm excluding pads.
Item Type: Article
Uncontrolled Keywords: BiCMOS integrated circuits; phased arrays
Divisions: Faculty of Engineering and Natural Sciences
Depositing User: Yaşar Gürbüz
Date Deposited: 01 Aug 2023 10:05
Last Modified: 01 Aug 2023 10:05
URI: https://research.sabanciuniv.edu/id/eprint/46697

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