Comparison of approximate circuits for H.264 and HEVC motion estimation

Official URL: https://dx.doi.org/10.1109/DSD51259.2020.00036

Motion estimation is the most computationally complex and power consuming module in video encoder hardware. Approximate hardware can achieve better performance, area and power consumption than accurate hardware while providing acceptable quality for error tolerant applications. In this paper, an approximate adder is proposed. Detailed comparison of several approximate circuits including the proposed approximate adder and traditional bit truncation technique for H.264 and HEVC motion estimation is presented. The proposed approximate adder achieved up to 10% power reduction in motion estimation hardware while providing better quality than the other approximate circuits.