A novel approximate high efficiency video coding DCT hardware

Official URL: https://dx.doi.org/10.1016/j.micpro.2026.105287

In this paper, a new Approximate Constant Multiplication (ACM) technique is proposed. A novel High Efficiency Video Coding (HEVC) two-dimensional (2D) Discrete Cosine Transform (DCT) hardware for all Transform Unit (TU) sizes is proposed using the new ACM technique. ACM hardware implementing the proposed approximation technique decreases Constant Multiplication (CM) to multiplication with a smaller constant. In the proposed hardware, the ACM is used for multiplications with only the DCT coefficients for which the average percentage error (APE) does not exceed 5%. In the proposed hardware, there are some common Constant Multiplications (CMs) that are calculated once so that the number of multiplications is reduced. The proposed approximate HEVC DCT hardware has smaller area, lower power consumption, and higher performance than the existing approximate HEVC DCT hardware at the cost of negligible quality loss. The FPGA and ASIC implementations of the proposed approximate hardware, in the worst case, can process 76 and 117 Quad Full HD (QFHD) frames per second, respectively.