Nonlinearity investigation of contact area in CMOS n-MOSFETs

Official URL: https://dx.doi.org/10.1109/ELECO69582.2025.11329371

This paper examines how the non-linearity of a 65 nm CMOS n-MOSFET is affected by variations in the contact area. Current-voltage characteristics and non-linear parameters, i.e., transconductance with its higher-order derivatives, are extracted and discussed together with performance parameters for short-channel-length devices. The simulation results show that the larger the contact area of the source and drain, the lower the parasitic resistance value can be obtained, resulting in a higher drain current and gm (transconductance). The gm2 and gm3 (transconductance values of the second and third order) also become large, and this is expected to have a direct impact on the non-linearity. The extracted VIP2 (Second-order voltage intercept point), VIP3 (Third-order voltage intercept point), and IIP3 (Input third-order intercept point) values for the proposed device are significantly higher than those of the baseline devices and reported data.