A theory of register monitors

Ferrère, Thomas and Henzinger, Thomas A. and Saraç, Naci Ege (2018) A theory of register monitors. In: 33rd Annual ACM/IEEE Symposium on Logic in Computer Science, LICS 2018, Oxford, England

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The task of a monitor is to watch, at run-time, the execution of a reactive system, and signal the occurrence of a safety violation in the observed sequence of events. While finite-state monitors have been studied extensively, in practice, monitoring software also makes use of unbounded memory. We define a model of automata equipped with integer-valued registers which can execute only a bounded number of instructions between consecutive events, and thus can form the theoretical basis for the study of infinite-state monitors. We classify these register monitors according to the number k of available registers, and the type of register instructions. In stark contrast to the theory of computability for register machines, we prove that for every k 1, monitors with k + 1 counters (with instruction set 〈+1, =〉) are strictly more expressive than monitors with k counters. We also show that adder monitors (with instruction set 〈1, +, =〉) are strictly more expressive than counter monitors, but are complete for monitoring all computable safety -languages for k = 6. Real-time monitors are further required to signal the occurrence of a safety violation as soon as it occurs. The expressiveness hierarchy for counter monitors carries over to real-time monitors. We then show that 2 adders cannot simulate 3 counters in real-time. Finally, we show that real-time adder monitors with inequalities are as expressive as real-time Turing machines.
Item Type: Papers in Conference Proceedings
Divisions: Faculty of Engineering and Natural Sciences
Depositing User: Naci Ege Saraç
Date Deposited: 03 Jun 2023 21:18
Last Modified: 03 Jun 2023 21:18
URI: https://research.sabanciuniv.edu/id/eprint/45842

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