An overlapped block motion compensation hardware for frame rate conversion

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Özcan, Tevfik Zafer and Çakır, Çağla and Çetin, Mert and Hamzaoğlu, İlker (2011) An overlapped block motion compensation hardware for frame rate conversion. In: 14th Euromicro Conference on Digital System Design (DSD 2011), Oulu, Finland

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Abstract

Overlapped Block Motion Compensation (OBMC) technique is used to avoid blocking artifacts occurring because of block based processing in video enhancement and compression applications. In this paper, we propose Weighted Coefficient OBMC (WC-OBMC) algorithm and an efficient hardware architecture for its implementation. WC-OBMC produces high quality results with low computational complexity for frame rate up conversion of High Definition (HD) video. The proposed hardware implementation of WC-OBMC algorithm consumes 20% of the slices in a Xilinx XC6SLX9-2 FPGA. It can work at 65 MHz in the same FPGA, and it is capable of processing 31 1280x720 HD frames per second.
Item Type: Papers in Conference Proceedings
Uncontrolled Keywords: FPGA , Frame Rate Conversion , Hardware Implementation , Overlapped Block Motion Compensation
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics > TK7885-7895 Computer engineering. Computer hardware
T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions: Faculty of Engineering and Natural Sciences > Academic programs > Electronics
Faculty of Engineering and Natural Sciences
Depositing User: İlker Hamzaoğlu
Date Deposited: 07 Jan 2012 20:40
Last Modified: 26 Apr 2022 09:03
URI: https://research.sabanciuniv.edu/id/eprint/18010

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