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Design of a programmable low-noise and low-power readout channel for solid-state detectors

Diba, Milad (2021) Design of a programmable low-noise and low-power readout channel for solid-state detectors. [Thesis]

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Official URL: https://risc01.sabanciuniv.edu/record=b2579289_(Table of contents)

Abstract

Current medical X- and Gamma-ray imaging applications benefit from the usage of semiconductor detectors that sum up the incident flux over time. Although these systems have shown promising results, they expose a large radiation dose to the patient, and they do not have sufficient contrast resolution to discriminate between some tissue types. Significant improvements in patient dose, image quality, and ability to perform tissue discrimination can be achieved by utilizing new technologies and readout methods if requirements for high count rates, good efficiency, and reasonable energy resolution can be met. Photon-counting detectors for energy and timing measurements have been developed for applications such as Positron Emission Tomography (PET) and X-ray diffraction imaging offering better energy resolution and prominent detection efficiency. Hence, to meet the requirements, there is a demand for customized fast, low-noise, and low-power Application-Specific Integrated Circuits (ASICs) [1, 2, 3]. In this work, A programmable low-power, low-noise readout circuit for Cadmium Zinc Telluride (CdZnTe or CZT) detectors is presented. CdZnTe detectors encompass a wide range of applications such as medical imaging and astrophysics. The front-end comprises a charge-sensitive amplifier (CSA), a programmable reset network with dark current compensation capability, a fifth-order semi-Gaussian filter with pole-zero cancellation, a comparator, and serial interface to communicate with external microcontroller. Utilizing the programmablity of the resetnetwork, the CSA can provide 256 different discharge timeconstants, ranging from 60n to 600 μ seconds , making the readout suitable for a wide range of event-rates. The applicationspecific integrated circuit (ASIC) is designed and simulated in a 0.35-μm 3.3V C35 CMOS process of Austria Micro-Systems. The ASIC has a power consumption of less than 2 mW per channel and the CSA only consumes 260 μW, stable with a feedback capacitance of 60 fF which contributes to a conversion gain of 135 mV/fC. Equivalent Noise Charge (ENC) is 98 erms @ 0 pF detector capacitance.

Item Type:Thesis
Uncontrolled Keywords:X-ray detection, Solid-State Detectors, ASIC, Gamma-Ray, Medical Imaging, Low-Power, Low-Noise. -- X-ısını. -- ASIC. -- Gamma-ısını, düsük güç. -- düsük gürültü. -- Solid State dedektörleri. -- tıbbi Görüntüleme.
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK1-4661 Electrical engineering. Electronics Nuclear engineering
ID Code:42486
Deposited By:IC-Cataloging
Deposited On:15 Oct 2021 10:34
Last Modified:15 Oct 2021 10:34

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