A low-power CMOS readout IC with on-chip column-parallel SAR ADCs for microbolometer applications

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Shafique, Atia and Ceylan, Ömer and Yazıcı, Melik and Kaynak, Mehmet and Gürbüz, Yaşar (2018) A low-power CMOS readout IC with on-chip column-parallel SAR ADCs for microbolometer applications. In: SPIE Defense + Security 2018: Infrared Technology and Applications XLIV, Orlando, USA

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Official URL: http://dx.doi.org/10.1117/12.2304994


A readout IC (ROIC) designed for high temperature coefficient of resistance (TCR) SiGe microbolometers is presented. The ROIC is designed for higher Ge content SiGe microbolometers which have higher detector resistance (∼1MΩ) and higher TCR values (∼%5.5/K). The ROIC includes column SAR ADCs for on-chip column-parallel analog to digital conversion. SAR ADC architecture is chosen to reduce the overall power consumption. The problem of resistance variation across the bolometers which introduce fixed pattern noise is addressed by setting a tunable reference resistor shared for each column which can be calibrated offline to set the common-mode level. Moreover, column non-uniformity has been reduced through comparator offset compensation in the SAR ADC. The columnwise architecture in this work reduces the number of integrators needed in the architecture and enables 17×17 μm2 pixel sizes. The prototype has been designed and fabricated in 0.25-μm CMOS process.

Item Type:Papers in Conference Proceedings
ID Code:36447
Deposited By:Yaşar Gürbüz
Deposited On:08 Sep 2018 18:30
Last Modified:08 Sep 2018 18:30

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