A test platform for the noise characterization of SiGe microbolometer ROICs

Official URL: http://dx.doi.org/10.1109/JSEN.2018.2844864

This paper introduces an in-circuit performance evaluation system for SiGe microbolometer readout integrated circuits (ROICs) that can characterize the overall system noise performance by emulating microbolometers with MOSFETs biased in the triode region. Specifically, the proposed test platform is designed for the testing of imagers with high resistance SiGe microbolometers. The architecture of the ROIC is based on a bridge with active and reference bolometer pixels with a capacitive transimpedance amplifier input stage and column parallel integration with serial readout. Noise measurements along with simulated resistance curves of the dummy detectors are reported. The prototype with 17-mu m pixel pitch has been designed and fabricated in a 0.25-mu m SiGe BiCMOS process.