A 7-bit reverse-saturated SiGe HBT discrete gain step attenuator

Official URL: http://dx.doi.org/10.1109/TCSII.2019.2922418

In this study, the analysis, design and measured results of a fully integrated 7-Bit step attenuator implemented in a 0.25-μm Silicon-Germanium (SiGe) BiCMOS process technology, are described. The attenuator is designed based on delicately ordered and cascaded Π/T type attenuation blocks, which are comprised of series/shunt switches employing SiGe hetero-junction bipolar transistors (HBTs) with peak fT/fmax of 110/180 GHz. HBTs are employed as a series switch to decrease the insertion-loss of the attenuator. Moreover, to authors’ best knowledge, this is the first study presenting the effect of employing reverse-saturated HBTs as a shunt switch for each attenuation blocks. Thanks to this advancement, the highest input-referred 1-dB compression point (IP1dB) is reported for Si-based similar studies. This method also decreases the insertion-loss of the proposed attenuator. The measurements result in the state-of-the-art performance with 28.575 dB attenuation range by 0.225 dB gain steps while maintaining 7-bit amplitude resolution across 6.6 GHz to 12.8 GHz frequency band, where RMS phase error remains below 3.3∘ and insertion loss (IL) is less than 12.4 dB. The measured IP1dB of the attenuator is 13.5 dBm while drawing 8 mA from 3.3 V supply. The die occupies an area of 1.37 mm x 0.56 mm excluding pads.