A wideband (3-13 GHz) 7-bit SiGe BiCMOS step attenuator with improved flatness

Official URL: http://dx.doi.org/10.1109/MMS.2018.8612017

In this paper, a wideband (3-13 GHz) 7-bit digitally controlled attenuator designed with isolated NMOS is proposed. Flat attenuation states are generated by employing parallel capacitor for Pi type attenuation bits to compensate for the attenuation degradation in high frequencies for high attenuation bits. Also using isolated NMOS eliminates the internal parasitic capacitance effects of regular NMOS. The attenuator is designed in IHP 0.13um SiGe BiCMOS technology. The simulated RMS amplitude error is less than 0.17 dB and RMS phase error less than 2.8° over the whole frequency band. The precision of the attenuator is 0.25 dB whereas the attenuation range is 31.75 dB. The simulated insertion loss at the minimum attenuation level is -6.6 dB. The simulated input/output return losses of the designed attenuator are less than -9 dB over whole operating frequency. The simulated input/output losses are better than -10 dB between 4.6-13 GHz. The simulated input referred 1dB compression point is 16.8 dBm at 8 GHz. The dimensions of the designed attenuator are 1.592*0.793 mm 2 and area is 1.57 mm2.