title   
  

An efficient FPGA implementation of HEVC intra prediction

Azgın, Hasan and Mert, Ahmet Can and Kalalı, Ercan and Hamzaoğlu, İlker (2018) An efficient FPGA implementation of HEVC intra prediction. In: IEEE International Conference on Consumer Electronics (ICCE 2018), Las Vegas, NV, USA

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Official URL: http://dx.doi.org/10.1109/ICCE.2018.8326332

Abstract

Intra prediction algorithm used in High Efficiency Video Coding (HEVC) standard has very high computational complexity. In this paper, an efficient FPGA implementation of HEVC intra prediction is proposed for 4×4, 8×8, 16×16 and 32×32 angular prediction modes. In the proposed FPGA implementation, one intra angular prediction equation is implemented using one DSP block in FPGA. The proposed FPGA implementation, in the worst case, can process 55 Full HD (1920×1080) video frames per second. It has up to 34.66% less energy consumption than the original FPGA implementation of HEVC intra prediction. Therefore, it can be used in portable consumer electronics products that require a real-time HEVC encoder.

Item Type:Papers in Conference Proceedings
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
ID Code:36260
Deposited By:İlker Hamzaoğlu
Deposited On:14 Aug 2018 15:20
Last Modified:14 Aug 2018 23:20

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