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Constant-time hardware computation of elliptic curve scalar multiplication around the 128 bit security level

Ay, Atıl Utku and Mancillas-López, Cuauhtémoc and Öztürk, Erdinç and Rodríguez-Henríquez, Francisco and Savaş, Erkay (2018) Constant-time hardware computation of elliptic curve scalar multiplication around the 128 bit security level. Microprocessors and Microsystems, 62 . pp. 79-90. ISSN 0141-9331 (Print) 1872-9436 (Online)

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Official URL: http://dx.doi.org/10.1016/j.micpro.2018.05.005

Abstract

In this paper we present two classes of scalar multiplication hardware architectures that compute a constant-time variable-base point multiplication over the Galbraith–Lin–Scott (GLS) family of binary elliptic curves. Our first architecture is speed-optimized and utilizes the available hardware resources to achieve the fastest possible elliptic curve point multiplication operation. The second architecture, on the other hand, targets a more effective resource utilization by optimizing time-area product. Our hardware designs are especially tailored for the quadratic extension field $F_{2^{2n}}, with n = 127, which allows us to attain a security level close to 128 bits. We explore extensively the usage of digit-based and Karatsuba multipliers for performing the quadratic field arithmetic associated to GLS elliptic curves and report the area and time performance obtained by these two types of multipliers. Targeting a Xilinx Kintex-7 FPGA device, we report on real hardware implementations of our designs, the fastest of which achieves a delay of just 7.97 μs for computing one scalar multiplication on a 1-core design.

Item Type:Article
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics > TK7885-7895 Computer engineering. Computer hardware
Q Science > QA Mathematics > QA075 Electronic computers. Computer science
ID Code:35703
Deposited By:Erkay Savaş
Deposited On:17 Aug 2018 10:04
Last Modified:17 Aug 2018 10:04

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