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Design and implementation of a versatile cryptographic unit for RISC processors

Yumbul, Kazım and Savaş, Erkay and Kocabaş, Övünç and Großschädl, Johann (2014) Design and implementation of a versatile cryptographic unit for RISC processors. Security and Communication Networks, 7 (1). pp. 36-52. ISSN 1939-0114 (Print) 1939-0122 (Online)

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Official URL: http://dx.doi.org/10.1002/sec.555

Abstract

In this paper, we design, implement, and realize a cryptographic unit (CU) that can easily be integrated to any reduced instruction set computing (RISC)-type processor for the safe and efficient execution of cryptographic algorithms. Design of the CU takes a novel approach in the execution of cryptographic algorithms when compared with cryptographic accelerators and architectural enhancements. Although it is integrated to a pipeline of an embedded RISC processor, it is partially an autonomous unit with its own resources, which is analogous to the floating point unit in this sense. It provides new instructions to accelerate cryptographic algorithms, and its associated cost in terms of area is acceptable and justified by the improvement in the performance and efficiency. The CU can also be instrumental in protecting the cryptographic computation against active and passive attacks and other malicious processes running simultaneously. We demonstrate that the execution of Advanced Encryption Standart (AES) encryption can be performed inside the CU, which prevents secret and/or sensitive information from leaving the CU during the cryptographic computation.

Item Type:Article
Uncontrolled Keywords:security, cryptographic algorithms; computer architecture; instruction set extensions
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics > TK7885-7895 Computer engineering. Computer hardware
ID Code:20662
Deposited By:Erkay Savaş
Deposited On:05 Dec 2012 14:33
Last Modified:17 Feb 2014 09:44

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