title   
  

Energy reduction techniques for H.264 deblocking filter hardware

Adıbelli, Yusuf and Parlak, Mustafa and Hamzaoğlu, İlker (2011) Energy reduction techniques for H.264 deblocking filter hardware. IEEE Transactions on Consumer Electronics, 57 (3). pp. 1399-1407. ISSN 0098-3063

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Official URL: http://dx.doi.org/10.1109/TCE.2011.6018900

Abstract

In this paper, we propose pixel equality and pixel similarity based techniques for reducing the amount of computations performed by H.264 Deblocking Filter (DBF) algorithm, and therefore reducing the energy consumption of H.264 DBF hardware. These techniques avoid unnecessary calculations in H.264 DBF algorithm by exploiting the equality and similarity of the pixels used in DBF equations. The proposed techniques reduce the amount of addition and shift operations performed by H.264 DBF algorithm up to 52% and 67% respectively with a small comparison overhead. The pixel equality based technique does not affect PSNR. The pixel similarity based technique does not affect the PSNR for some video frames, but it decreases the PSNR slightly for some video frames. We also implemented an efficient H.264 DBF hardware including the proposed techniques using Verilog HDL. The proposed pixel equality and pixel similarity based techniques reduced the energy consumption of this H.264 DBF hardware up to 35% and 39%, respectively. Therefore, they can be used in portable consumer electronics products that require real-time video compression.

Item Type:Article
Uncontrolled Keywords:Deblocking Filter , Energy Reduction , FPGA , H.264 , Hardware Implementation
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics > TK7885-7895 Computer engineering. Computer hardware
T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
ID Code:18002
Deposited By:İlker Hamzaoğlu
Deposited On:04 Jan 2012 11:43
Last Modified:24 Jan 2012 11:50

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