title   
  

An Efficient H.264 intra frame coder system

Hamzaoğlu, İlker and Taşdizen, Özgür and Şahin, Esra (2008) An Efficient H.264 intra frame coder system. IEEE Transactions on Consumer Electronics, 54 (4). ISSN 0098-3063

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Abstract

In this paper, we present an efficient H.264 intra frame coder system that achieves real-time performance for portable consumer electronics applications with low hardware cost. The system includes a low cost intra prediction hardware design that implements all intra prediction modes used in H.264 video coding standard based on a novel organization of the intra prediction equations. The proposed hardware is implemented in Verilog HDL. The Verilog RTL code works at 71 MHz in a Xilinx Virtex II FPGA and it can code 35 CIF (352x288) frames per second. The system also includes software running on an Arm926EJS processor for implementing pre-processing and post-processing functions. The H.264 intra frame coder system is demonstrated to work correctly on an Arm Versatile Platform development board and it is verified to be compliant with H.264 standard.

Item Type:Article
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics > TK7885-7895 Computer engineering. Computer hardware
T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
ID Code:10571
Deposited By:İlker Hamzaoğlu
Deposited On:11 Nov 2008 14:44
Last Modified:25 May 2011 14:13

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